1. Field of the Invention
The present invention relates to a field emission display (FED).
2. Description of the Related Art
Field emission displays (FEDs) are those that emit light by collision of phosphors with cold electrons which are emitted into a vacuum from the surfaces of metals and semiconductors by tunneling effect caused under strong electric field.
FEDS emit light when phosphors are stimulated by an electron beam, like cathode ray tubes (CRTs). Therefore, FEDs have many advantages such as full color, full gray scale, high brightness, fast response time, wide viewing angle, wide operation temperature and humidity range. Furthermore, FEDs can be realized in the form of flat panel displays (FPDs) that are thin and lightweight, and emit little electromagnetic rays.
FEDs can be used not only as image display devices, but also as vacuum fluorescent displays, fluorescent lamps, white light sources, and back lights of liquid crystal displays (LCDs).                An example of a typical structure of FEDs is illustrated in FIG. 1.        
A cathode 2 made of electroconductive metal and a resistive layer 3 made of amorphous silicon (a-Si) are sequentially formed on a substrate 1. A gate insulating layer 4 made of an insulating material is formed on the resistive layer 3 and has a well 4a in which a portion of the surface of the resistive layer 3 is exposed. An emitter 5 is positioned on the exposed surface of the resistive layer 3 in the well 4a. The gate insulating layer 4 has thereon a gate electrode 6 with a gate 6a corresponding to the well 4a. The substrate 1, the cathode 2, the resistive layer 3, the gate insulating layer 4 having the well 4a, the emitter 5, and the gate electrode 6 constitute a rear panel.
An anode 7 as a transparent electrode is positioned above the gate electrode 6 while being spaced apart from the gate electrode 6 by a predetermined distance. The anode 7 is formed on the inner surface of a front plate 8 that forms, together with the substrate 1, a hermetically sealed vacuum gap. A phosphor layer (not shown) is formed on or adjacent to the inner surface of the anode 7. The anode 7, the phosphor layer, and the front plate 8 constitute a front panel.
The rear and front panels are spaced a predetermined distance apart from each other by a spacer (not shown) and edges of them are hermetically sealed. A vacuum gap is defined between the rear and front panels.
The operation principle of FEDs is as follows. A voltage is applied between the gate electrode 6 and the cathode 2 using various matrix addressing techniques. When a voltage is applied between the gate electrode 6 and the cathode 2, tunneling effect takes place, and thus, electrons are emitted from the emitter 5. The electrons are accelerated by anode voltage and then hit the phosphor layer positioned on the inner surface of the anode 7. The stimulated phosphor layer emits light.
In order to facilitate electron emission from the emitter by tunneling effect, a distance between the tip of the emitter and the gate 6a must be short. In this regard, it is advantageous to set the diameter of the well to be shorter. Recently, efforts have been made to form the well having its diameter of about 0.5 to 2 μm, preferably 1 μm or less. By way of an example, Korean Patent Application Laid-Open Publication No. 2002-0041665 discloses a method of forming a well with a sub-micro diameter using an anodic oxidation process.
In FEDs, as a gap between the rear and front panels increases, a distance between the cathode and the anode increases. In this regard, in order to directly head electrons emitted from the emitter toward the anode, a significantly high voltage must be applied between the cathode and the anode. However, such a high voltage requires an increase of capacities of devices used in a drive circuit for FEDs, whereby increase of a production cost of FEDs is incurred. In addition, when an operation voltage of FEDs increases, an electric power consumption of FEDs increases as well.
In conventional FEDs, rear and front panels are manufactured in separate fabrication processes and then assembled while maintaining a predetermined gap therebetween by a spacer. However, those skilled in the art would understand that a packaging process of assembling front and rear panels after installing a spacer between the front and rear panels is an undue burden process.